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The HFC-S PCI A is not recommended for new projects.
Please contact the Sales team of Cologne Chip
for further information and for a discussion about alternative components.
 Functions
The HFC-S PCI A is a HDLC B- and D-channel FIFO controller with integrated S/T interface.
It can be used for ISDN basic rate lines.
All channels (2B+D) are served fully duplex by six deep FIFOs.
The HFC-S PCI A has an integrated PCI bus interface.
Also implemented is a PCM30 highway interface, which is able to connect to many telecom serial busses.
Block Diagram
Features
- single chip ISDN-S-controller with B- and D-channel HDLC support
- integrated S/T interface
- independent read and write HDLC-channels for 2 ISDN B-channels and one ISDN D-channel
- B1- and B2-channel transparent mode independently selectable
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FIFO-Memory-Window (PC's memory is used for the FIFOs):
B-channel: 4x 7.5 KByte, maximum 31 HDLC frames per FIFO
D-channel: 2x 512 Byte, maximum 15 HDLC frames per FIFO
- 56 KBit/s restricted mode for U.S. ISDN lines selectable by software
- full I.430 ITU S/T ISDN support in TE and NT mode for 3.3V and 5V power supply
- B1+B2 HDLC mode
- PCM30 interface configurable to interface MITEL STTM bus (MVIPTM), Siemens IOM2TM or GCITM for interface to U-chip or external CODECs
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integrated PCI Spec. 2.2 bus interface (power management included, ACPI ready) for 3.3V and 5V bus signal environment
- direct access to PCM30 interface for tone synthetisation
- CMOS technology 3-5V
- QFP 100 package, RoHS compliant
Applications
Linux Driver
Generic Linux drivers are available for HFC-S PCI A.
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Evaluation Board
Contact us for an evaluation board of HFC-S PCI A.
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Datasheet
Get Datasheet
Copyright © 2007 Cologne Chip
The ISDN Chip Company!
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Last Modified: 22/05/2007
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